Packages

c

tensil.mem.Mem

InnerMem

class InnerMem[T <: Data] extends Module

Linear Supertypes
LegacyModule, MultiIOModule, RawModule, BaseModule, HasId, InstanceId, AnyRef, Any
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. InnerMem
  2. LegacyModule
  3. MultiIOModule
  4. RawModule
  5. BaseModule
  6. HasId
  7. InstanceId
  8. AnyRef
  9. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new InnerMem(gen: T, depth: Long, kind: MemKind)

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit
    Definition Classes
    BaseModule
  8. def _compatIoPortBound(): Boolean
    Attributes
    protected
    Definition Classes
    LegacyModule
  9. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  10. def circuitName: String
    Attributes
    protected
    Definition Classes
    HasId
  11. final val clock: Clock
    Definition Classes
    MultiIOModule
  12. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native() @HotSpotIntrinsicCandidate()
  13. val compileOptions: CompileOptions
    Definition Classes
    RawModule
  14. def computeName(defaultPrefix: Option[String], defaultSeed: Option[String]): Option[String]
    Definition Classes
    HasId
  15. def desiredName: String
    Definition Classes
    BaseModule
  16. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  17. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  18. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  19. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  20. def getIds: Seq[HasId]
    Attributes
    protected
    Definition Classes
    BaseModule
  21. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  22. lazy val getPorts: Seq[chisel3.internal.firrtl.Port]
    Definition Classes
    RawModule
  23. def hasSeed: Boolean
    Definition Classes
    HasId
  24. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  25. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  26. val io: Bundle { ... /* 3 definitions in type refinement */ }
    Definition Classes
    InnerMem → LegacyModule
  27. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  28. final lazy val name: String
    Definition Classes
    BaseModule
  29. def nameIds(rootClass: Class[_]): HashMap[HasId, String]
    Attributes
    protected
    Definition Classes
    BaseModule
  30. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  31. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  32. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  33. var override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    LegacyModule
  34. var override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    LegacyModule
  35. def parentModName: String
    Definition Classes
    HasId → InstanceId
  36. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  37. def pathName: String
    Definition Classes
    HasId → InstanceId
  38. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  39. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  40. final val reset: Reset
    Definition Classes
    MultiIOModule
  41. def suggestName(seed: ⇒ String): InnerMem.this.type
    Definition Classes
    HasId
  42. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  43. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  44. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  45. def toString(): String
    Definition Classes
    AnyRef → Any
  46. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  47. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  48. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  49. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] ) @Deprecated
    Deprecated

Inherited from LegacyModule

Inherited from MultiIOModule

Inherited from RawModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped