Packages

c

tensil.tcu.simd

ALUArray

class ALUArray[T <: Data with Num[T]] extends Module

Linear Supertypes
LegacyModule, MultiIOModule, RawModule, BaseModule, HasId, InstanceId, AnyRef, Any
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. ALUArray
  2. LegacyModule
  3. MultiIOModule
  4. RawModule
  5. BaseModule
  6. HasId
  7. InstanceId
  8. AnyRef
  9. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new ALUArray(gen: T, arch: Architecture)

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit
    Definition Classes
    BaseModule
  8. def _compatIoPortBound(): Boolean
    Attributes
    protected
    Definition Classes
    LegacyModule
  9. val alu: IndexedSeq[Unit]
  10. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  11. def circuitName: String
    Attributes
    protected
    Definition Classes
    HasId
  12. final val clock: Clock
    Definition Classes
    MultiIOModule
  13. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native() @HotSpotIntrinsicCandidate()
  14. val compileOptions: CompileOptions
    Definition Classes
    RawModule
  15. def computeName(defaultPrefix: Option[String], defaultSeed: Option[String]): Option[String]
    Definition Classes
    HasId
  16. def desiredName: String
    Definition Classes
    BaseModule
  17. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  18. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  19. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  20. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  21. def getIds: Seq[HasId]
    Attributes
    protected
    Definition Classes
    BaseModule
  22. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  23. lazy val getPorts: Seq[Port]
    Definition Classes
    RawModule
  24. def hasSeed: Boolean
    Definition Classes
    HasId
  25. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  26. val input: DecoupledIO[Vec[T]]
  27. val inputNeeded: Bool
  28. val inputNotNeeded: Bool
  29. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  30. val instruction: DecoupledIO[Instruction]
  31. val instructionType: Instruction
  32. val io: Bundle { ... /* 3 definitions in type refinement */ }
    Definition Classes
    ALUArray → LegacyModule
  33. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  34. val layout: InstructionLayout
  35. final lazy val name: String
    Definition Classes
    BaseModule
  36. def nameIds(rootClass: Class[_]): HashMap[HasId, String]
    Attributes
    protected
    Definition Classes
    BaseModule
  37. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  38. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  39. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  40. val numOps: Int
  41. val numRegisters: Int
  42. val output: Queue[Vec[T]]
  43. var override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    LegacyModule
  44. var override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    LegacyModule
  45. def parentModName: String
    Definition Classes
    HasId → InstanceId
  46. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  47. def pathName: String
    Definition Classes
    HasId → InstanceId
  48. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  49. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  50. final val reset: Reset
    Definition Classes
    MultiIOModule
  51. def suggestName(seed: ⇒ String): ALUArray.this.type
    Definition Classes
    HasId
  52. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  53. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  54. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  55. def toString(): String
    Definition Classes
    AnyRef → Any
  56. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  57. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  58. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  59. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  60. val width: Int

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] ) @Deprecated
    Deprecated

Inherited from LegacyModule

Inherited from MultiIOModule

Inherited from RawModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped