c

tensil.tcu

SystolicArray

class SystolicArray[T <: Data with Num[T]] extends Module

Linear Supertypes
LegacyModule, MultiIOModule, RawModule, BaseModule, HasId, InstanceId, AnyRef, Any
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. SystolicArray
  2. LegacyModule
  3. MultiIOModule
  4. RawModule
  5. BaseModule
  6. HasId
  7. InstanceId
  8. AnyRef
  9. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new SystolicArray(gen: T, height: Int, width: Int, debug: Boolean = false)

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit
    Definition Classes
    BaseModule
  8. def _compatIoPortBound(): Boolean
    Attributes
    protected
    Definition Classes
    LegacyModule
  9. val array: InnerSystolicArray[T]
  10. val arrayPropagationCountdown: UInt
  11. val arrayPropagationDelay: Int
  12. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  13. def circuitName: String
    Attributes
    protected
    Definition Classes
    HasId
  14. final val clock: Clock
    Definition Classes
    MultiIOModule
  15. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native() @HotSpotIntrinsicCandidate()
  16. val compileOptions: CompileOptions
    Definition Classes
    RawModule
  17. def computeName(defaultPrefix: Option[String], defaultSeed: Option[String]): Option[String]
    Definition Classes
    HasId
  18. val control: DecoupledIO[Bundle { ... /* 2 definitions in type refinement */ }]
  19. def desiredName: String
    Definition Classes
    BaseModule
  20. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  21. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  22. val gen: T
  23. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  24. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  25. def getIds: Seq[HasId]
    Attributes
    protected
    Definition Classes
    BaseModule
  26. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  27. lazy val getPorts: Seq[Port]
    Definition Classes
    RawModule
  28. def hasSeed: Boolean
    Definition Classes
    HasId
  29. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  30. val height: Int
  31. val input: DecoupledIO[Vec[T]]
  32. val inputDone: Bool
  33. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  34. val io: Bundle { ... /* 6 definitions in type refinement */ }
    Definition Classes
    SystolicArray → LegacyModule
  35. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  36. val loadWeight: Bool
  37. val loadZeroes: Bool
  38. val loading: Bool
  39. final lazy val name: String
    Definition Classes
    BaseModule
  40. def nameIds(rootClass: Class[_]): HashMap[HasId, String]
    Attributes
    protected
    Definition Classes
    BaseModule
  41. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  42. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  43. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  44. val output: Queue[Vec[T]]
  45. var override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    LegacyModule
  46. var override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    LegacyModule
  47. def parentModName: String
    Definition Classes
    HasId → InstanceId
  48. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  49. def pathName: String
    Definition Classes
    HasId → InstanceId
  50. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  51. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  52. val ran: Queue[Bundle { val zeroes: chisel3.Bool }]
  53. final val reset: Reset
    Definition Classes
    MultiIOModule
  54. val runInput: Bool
  55. val runZeroes: Bool
  56. val running: Bool
  57. def suggestName(seed: ⇒ String): SystolicArray.this.type
    Definition Classes
    HasId
  58. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  59. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  60. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  61. def toString(): String
    Definition Classes
    AnyRef → Any
  62. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  63. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  64. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  65. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  66. val weight: DecoupledIO[Vec[T]]
  67. val width: Int

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] ) @Deprecated
    Deprecated

Inherited from LegacyModule

Inherited from MultiIOModule

Inherited from RawModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped