The program counter and decoder control bus handshake signals can be sampled at a fixed interval of L cycles in order to measure system performance. The samples are written out to the sample IO bus in blocks of N sample words. The block is terminated by asserting the AXI stream TLAST signal. Each sample word is a 64-bit word, with the following meaning:
|Bus name||Signal||Bit field(s)||Comments|
|Program counter||0:31||Contains all 1s if the sample is invalid. Invalid samples are produced when the sampling interval is set to 0.|
|Array||Valid||32||Contains all 0s if the sample is invalid.|
Value of L can be changed by setting the configuration register. Value of N is defined by architecture.